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1. Which is the following use least power?
- A. TTL
- B. TTL
- C. TTL
- D. TTL
Answer: Option C
Explanation:
The option that uses the least power is 3. CMOS.
Explanation: CMOS (Complementary Metal-Oxide-Semiconductor) logic circuits consume significantly less power compared to TTL (Transistor-Transistor Logic) and ECL (Emitter-Coupled Logic) because they only draw current during state transitions, meaning they use very little power when idle.
Why other options are incorrect:
Explanation: CMOS (Complementary Metal-Oxide-Semiconductor) logic circuits consume significantly less power compared to TTL (Transistor-Transistor Logic) and ECL (Emitter-Coupled Logic) because they only draw current during state transitions, meaning they use very little power when idle.
Why other options are incorrect:
- TTL: TTL circuits have transistors continuously conducting current, resulting in higher power dissipation compared to CMOS.
- ECL: ECL has the highest power consumption among the listed options due to its constant current requirement for maintaining differential amplifier operation.
- All use same power: This is incorrect, as CMOS clearly consumes significantly less power than TTL and ECL.
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